IQ4_NL: 4-bit non-linear quants with blocks of 32 (#5590)
* iq4_nl: squash commits for easier rebase * Basics (quantize, dequantize) * CUDA dequantize and dot product * Slightly faster CUDA dot product (120 t/s) * Switch to 6-bit scales * Scalar dot product * AVX2 dot product * ARM_NEON dot product * Works on metal, but still slow * Slightly better Metal dot product * Another small Metal improvement * Metal dot product is getting there * Faster CUDA dot product * Add 1/8 ffn_down layers as Q5_K when no imatrix has been provided * Report the actual bpw * Add _xs mix that is 4.05 bpw for non-MoE models * Remove IQ4_XS for now, slightly adjust kvalues_iq4nl * AVX2 dot product uses Q8_0 instead of Q8_K * Add to test-backend-ops * Minor fix * Also use use Q5_K for attn_output in MoE models * Fixes after merging latest master * Switching to blocks of 32 * AVX2 for blocks of 32 * Scaler dot product for blocks of 32 * ARM_NEON dot product for blocks of 32 * Metal kernels for blocks of 32 * Slightly faster Metal kernels * iq4_nl: Fix after merging with master * iq4_nl: another fix after merging with master * Use IQ4_NL instead of Q4_K when using k-quants is not possible * Fix typo that makes several tests fail * It was the ggml_vdotq thing missed inside the brackets --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
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Kawrakow
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11 changed files with 640 additions and 7 deletions
35
ggml-metal.m
35
ggml-metal.m
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@ -62,6 +62,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ2_XS,
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GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ3_XXS,
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GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ1_S,
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GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ4_NL,
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GGML_METAL_KERNEL_TYPE_GET_ROWS_I32,
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GGML_METAL_KERNEL_TYPE_RMS_NORM,
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GGML_METAL_KERNEL_TYPE_GROUP_NORM,
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@ -85,6 +86,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_MUL_MV_IQ2_XS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_IQ3_XXS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_IQ1_S_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_IQ4_NL_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F32_F32,
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//GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F16_F16,
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F16_F32,
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@ -104,6 +106,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ2_XS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ3_XXS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ1_S_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ4_NL_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_F32_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_F16_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_Q4_0_F32,
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@ -120,6 +123,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_MUL_MM_IQ2_XS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_IQ3_XXS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_IQ1_S_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_IQ4_NL_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_F32_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_F16_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_Q4_0_F32,
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@ -136,6 +140,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ2_XS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ3_XXS_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ1_S_F32,
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GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ4_NL_F32,
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GGML_METAL_KERNEL_TYPE_ROPE_F32,
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GGML_METAL_KERNEL_TYPE_ROPE_F16,
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GGML_METAL_KERNEL_TYPE_ALIBI_F32,
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@ -448,6 +453,7 @@ static struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ2_XS, get_rows_iq2_xs, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ3_XXS, get_rows_iq3_xxs, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ1_S, get_rows_iq1_s, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ4_NL, get_rows_iq4_nl, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GET_ROWS_I32, get_rows_i32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_RMS_NORM, rms_norm, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GROUP_NORM, group_norm, ctx->support_simdgroup_reduction);
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@ -471,6 +477,7 @@ static struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_IQ2_XS_F32, mul_mv_iq2_xs_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_IQ3_XXS_F32, mul_mv_iq3_xxs_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_IQ1_S_F32, mul_mv_iq1_s_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_IQ4_NL_F32, mul_mv_iq4_nl_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F32_F32, mul_mv_id_f32_f32, ctx->support_simdgroup_reduction);
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//GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F16_F16, mul_mv_id_f16_f16, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_F16_F32, mul_mv_id_f16_f32, ctx->support_simdgroup_reduction);
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@ -490,6 +497,7 @@ static struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ2_XS_F32, mul_mv_id_iq2_xs_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ3_XXS_F32, mul_mv_id_iq3_xxs_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ1_S_F32, mul_mv_id_iq1_s_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ4_NL_F32, mul_mv_id_iq4_nl_f32, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_F32_F32, mul_mm_f32_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_F16_F32, mul_mm_f16_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_Q4_0_F32, mul_mm_q4_0_f32, ctx->support_simdgroup_mm);
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@ -506,6 +514,7 @@ static struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_IQ2_XS_F32, mul_mm_iq2_xs_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_IQ3_XXS_F32, mul_mm_iq3_xxs_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_IQ1_S_F32, mul_mm_iq1_s_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_IQ4_NL_F32, mul_mm_iq4_nl_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_F32_F32, mul_mm_id_f32_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_F16_F32, mul_mm_id_f16_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_Q4_0_F32, mul_mm_id_q4_0_f32, ctx->support_simdgroup_mm);
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@ -522,6 +531,7 @@ static struct ggml_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ2_XS_F32, mul_mm_id_iq2_xs_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ3_XXS_F32, mul_mm_id_iq3_xxs_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ1_S_F32, mul_mm_id_iq1_s_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ4_NL_F32, mul_mm_id_iq4_nl_f32, ctx->support_simdgroup_mm);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_ROPE_F32, rope_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_ROPE_F16, rope_f16, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_ALIBI_F32, alibi_f32, true);
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@ -1338,6 +1348,7 @@ static bool ggml_metal_graph_compute(
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case GGML_TYPE_IQ2_XS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_IQ2_XS_F32 ].pipeline; break;
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case GGML_TYPE_IQ3_XXS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_IQ3_XXS_F32].pipeline; break;
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case GGML_TYPE_IQ1_S: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_IQ1_S_F32 ].pipeline; break;
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case GGML_TYPE_IQ4_NL: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_IQ4_NL_F32 ].pipeline; break;
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default: GGML_ASSERT(false && "MUL MAT-MAT not implemented");
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}
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@ -1478,6 +1489,12 @@ static bool ggml_metal_graph_compute(
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nth1 = 16;
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MV_IQ1_S_F32].pipeline;
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} break;
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case GGML_TYPE_IQ4_NL:
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{
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nth0 = 4;
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nth1 = 16;
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MV_IQ4_NL_F32].pipeline;
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} break;
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default:
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{
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GGML_METAL_LOG_ERROR("Asserting on type %d\n", (int)src0t);
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@ -1525,6 +1542,11 @@ static bool ggml_metal_graph_compute(
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[encoder setThreadgroupMemoryLength:mem_size atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 7)/8, ne11, ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_IQ4_NL) {
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const int mem_size = 32*sizeof(float);
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[encoder setThreadgroupMemoryLength:mem_size atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 3)/4, ne11, ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src0t == GGML_TYPE_Q4_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne01 + 3)/4, ne11, ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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@ -1619,6 +1641,7 @@ static bool ggml_metal_graph_compute(
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case GGML_TYPE_IQ2_XS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ2_XS_F32 ].pipeline; break;
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case GGML_TYPE_IQ3_XXS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ3_XXS_F32].pipeline; break;
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case GGML_TYPE_IQ1_S: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ1_S_F32 ].pipeline; break;
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case GGML_TYPE_IQ4_NL: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MM_ID_IQ4_NL_F32 ].pipeline; break;
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default: GGML_ASSERT(false && "MUL_MAT_ID not implemented");
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}
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@ -1762,6 +1785,12 @@ static bool ggml_metal_graph_compute(
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nth1 = 16;
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ1_S_F32].pipeline;
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} break;
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case GGML_TYPE_IQ4_NL:
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{
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nth0 = 4;
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nth1 = 16;
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_MUL_MV_ID_IQ4_NL_F32].pipeline;
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} break;
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default:
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{
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GGML_METAL_LOG_ERROR("Asserting on type %d\n", (int)src2t);
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@ -1825,6 +1854,11 @@ static bool ggml_metal_graph_compute(
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[encoder setThreadgroupMemoryLength:mem_size atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake((ne21 + 7)/8, _ne1, ne01*ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src2t == GGML_TYPE_IQ4_NL) {
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const int mem_size = 32*sizeof(float);
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[encoder setThreadgroupMemoryLength:mem_size atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake((ne21 + 3)/4, _ne1, ne01*ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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else if (src2t == GGML_TYPE_Q4_K) {
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[encoder dispatchThreadgroups:MTLSizeMake((ne21 + 3)/4, _ne1, ne01*ne12*ne13) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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}
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@ -1867,6 +1901,7 @@ static bool ggml_metal_graph_compute(
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case GGML_TYPE_IQ2_XS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ2_XS ].pipeline; break;
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case GGML_TYPE_IQ3_XXS: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ3_XXS].pipeline; break;
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case GGML_TYPE_IQ1_S: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ1_S ].pipeline; break;
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case GGML_TYPE_IQ4_NL: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_GET_ROWS_IQ4_NL ].pipeline; break;
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case GGML_TYPE_I32: pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_GET_ROWS_I32 ].pipeline; break;
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default: GGML_ASSERT(false && "not implemented");
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}
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